The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Dans cet article, l'optimisation et la vérification des circuits arithmétiques ORNS à chiffres à valeurs multiples en mode courant sont présentées. L'ORNS à chiffres à valeurs multiples est le système numérique redondant utilisant des valeurs de chiffres dans la logique à valeurs multiples et il réalise le calcul entièrement parallèle sans aucune propagation de report d'ondulation. Premièrement, les algorithmes d'addition et de multiplication sur 4 bits utilisant l'ORNS à chiffres à valeurs multiples sont optimisés grâce à des analyses de niveau logique. Dans le multiplicateur, la valeur numérique maximale et le nombre d'opérations modulo en série sont réduits avec succès de 49 à 29 et de 3 à 2, respectivement, grâce à la disposition des lignes d'addition. Ensuite, les composants du circuit tels qu'un miroir de courant sont vérifiés à l'aide de HSPICE. Le miroir de courant commuté proposé, qui possède des fonctions de miroir de courant et de commutateur analogique, est efficace pour réduire la tension de fonctionnement minimale d'environ 0.13 volt. Outre une région ordinaire de forte inversion, les composants du circuit fonctionnant dans la région de faible inversion montrent de bons résultats de simulation avec un courant unitaire de 10 nanoampères, et cela apporte à la fois une dissipation de puissance plus faible et un fonctionnement stable sous une tension d'alimentation plus faible.
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Motoi INABA, Koichi TANNO, Hiroki TAMURA, Okihiko ISHIZUKA, "Optimization and Verification of Current-Mode Multiple-Valued Digit ORNS Arithmetic Circuits" in IEICE TRANSACTIONS on Information,
vol. E93-D, no. 8, pp. 2073-2079, August 2010, doi: 10.1587/transinf.E93.D.2073.
Abstract: In this paper, optimization and verification of the current-mode multiple-valued digit ORNS arithmetic circuits are presented. The multiple-valued digit ORNS is the redundant number system using digit values in the multiple-valued logic and it realizes the full-parallel calculation without any ripple carry propagation. First, the 4-bit addition and multiplication algorithms employing the multiple-valued digit ORNS are optimized through logic-level analyses. In the multiplier, the maximum digit value and the number of modulo operations in series are successfully reduced from 49 to 29 and from 3 to 2, respectively, by the arrangement of addition lines. Next, circuit components such as a current mirror are verified using HSPICE. The proposed switched current mirror which has functions of a current mirror and an analog switch is effective to reduce the minimum operation voltage by about 0.13 volt. Besides an ordinary strong-inversion region, the circuit components operated under the weak-inversion region show good simulation results with the unit current of 10 nanoamperes, and it brings both of the lower power dissipation and the stable operation under the lower supply voltage.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E93.D.2073/_p
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@ARTICLE{e93-d_8_2073,
author={Motoi INABA, Koichi TANNO, Hiroki TAMURA, Okihiko ISHIZUKA, },
journal={IEICE TRANSACTIONS on Information},
title={Optimization and Verification of Current-Mode Multiple-Valued Digit ORNS Arithmetic Circuits},
year={2010},
volume={E93-D},
number={8},
pages={2073-2079},
abstract={In this paper, optimization and verification of the current-mode multiple-valued digit ORNS arithmetic circuits are presented. The multiple-valued digit ORNS is the redundant number system using digit values in the multiple-valued logic and it realizes the full-parallel calculation without any ripple carry propagation. First, the 4-bit addition and multiplication algorithms employing the multiple-valued digit ORNS are optimized through logic-level analyses. In the multiplier, the maximum digit value and the number of modulo operations in series are successfully reduced from 49 to 29 and from 3 to 2, respectively, by the arrangement of addition lines. Next, circuit components such as a current mirror are verified using HSPICE. The proposed switched current mirror which has functions of a current mirror and an analog switch is effective to reduce the minimum operation voltage by about 0.13 volt. Besides an ordinary strong-inversion region, the circuit components operated under the weak-inversion region show good simulation results with the unit current of 10 nanoamperes, and it brings both of the lower power dissipation and the stable operation under the lower supply voltage.},
keywords={},
doi={10.1587/transinf.E93.D.2073},
ISSN={1745-1361},
month={August},}
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TY - JOUR
TI - Optimization and Verification of Current-Mode Multiple-Valued Digit ORNS Arithmetic Circuits
T2 - IEICE TRANSACTIONS on Information
SP - 2073
EP - 2079
AU - Motoi INABA
AU - Koichi TANNO
AU - Hiroki TAMURA
AU - Okihiko ISHIZUKA
PY - 2010
DO - 10.1587/transinf.E93.D.2073
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E93-D
IS - 8
JA - IEICE TRANSACTIONS on Information
Y1 - August 2010
AB - In this paper, optimization and verification of the current-mode multiple-valued digit ORNS arithmetic circuits are presented. The multiple-valued digit ORNS is the redundant number system using digit values in the multiple-valued logic and it realizes the full-parallel calculation without any ripple carry propagation. First, the 4-bit addition and multiplication algorithms employing the multiple-valued digit ORNS are optimized through logic-level analyses. In the multiplier, the maximum digit value and the number of modulo operations in series are successfully reduced from 49 to 29 and from 3 to 2, respectively, by the arrangement of addition lines. Next, circuit components such as a current mirror are verified using HSPICE. The proposed switched current mirror which has functions of a current mirror and an analog switch is effective to reduce the minimum operation voltage by about 0.13 volt. Besides an ordinary strong-inversion region, the circuit components operated under the weak-inversion region show good simulation results with the unit current of 10 nanoamperes, and it brings both of the lower power dissipation and the stable operation under the lower supply voltage.
ER -