The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Le calcul haute performance (HPC) a pénétré de nombreux domaines de recherche, mais l'augmentation de la puissance de calcul est limitée par les interconnexions électriques conventionnelles. L'architecture proposée, NEST, exploite le routage de longueur d'onde dans des routeurs à réseaux de guides d'ondes en réseau (AWGR) pour obtenir un réseau évolutif, à faible latence et à haut débit. Pour la communication intra pod et inter pod, la topologie symétrique de NEST réduit le diamètre du réseau, ce qui entraîne une augmentation des performances de latence. De plus, l'architecture proposée permet une croissance exponentielle de la taille du réseau. Les résultats de la simulation démontrent que NEST affiche en moyenne une amélioration de la latence de 36 % et une amélioration du débit de 30 % par rapport à la libellule.
Yunfeng LU
Xidian University
Huaxi GU
Xidian University
Xiaoshan YU
Xidian University
Kun WANG
Xidian University
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Yunfeng LU, Huaxi GU, Xiaoshan YU, Kun WANG, "NEST: Towards Extreme Scale Computing Systems" in IEICE TRANSACTIONS on Information,
vol. E101-D, no. 11, pp. 2827-2830, November 2018, doi: 10.1587/transinf.2018EDL8148.
Abstract: High-performance computing (HPC) has penetrated into various research fields, yet the increase in computing power is limited by conventional electrical interconnections. The proposed architecture, NEST, exploits wavelength routing in arrayed waveguide grating routers (AWGRs) to achieve a scalable, low-latency, and high-throughput network. For the intra pod and inter pod communication, the symmetrical topology of NEST reduces the network diameter, which leads to an increase in latency performance. Moreover, the proposed architecture enables exponential growth of network size. Simulation results demonstrate that NEST shows 36% latency improvement and 30% throughput improvement over the dragonfly on an average.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.2018EDL8148/_p
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@ARTICLE{e101-d_11_2827,
author={Yunfeng LU, Huaxi GU, Xiaoshan YU, Kun WANG, },
journal={IEICE TRANSACTIONS on Information},
title={NEST: Towards Extreme Scale Computing Systems},
year={2018},
volume={E101-D},
number={11},
pages={2827-2830},
abstract={High-performance computing (HPC) has penetrated into various research fields, yet the increase in computing power is limited by conventional electrical interconnections. The proposed architecture, NEST, exploits wavelength routing in arrayed waveguide grating routers (AWGRs) to achieve a scalable, low-latency, and high-throughput network. For the intra pod and inter pod communication, the symmetrical topology of NEST reduces the network diameter, which leads to an increase in latency performance. Moreover, the proposed architecture enables exponential growth of network size. Simulation results demonstrate that NEST shows 36% latency improvement and 30% throughput improvement over the dragonfly on an average.},
keywords={},
doi={10.1587/transinf.2018EDL8148},
ISSN={1745-1361},
month={November},}
Copier
TY - JOUR
TI - NEST: Towards Extreme Scale Computing Systems
T2 - IEICE TRANSACTIONS on Information
SP - 2827
EP - 2830
AU - Yunfeng LU
AU - Huaxi GU
AU - Xiaoshan YU
AU - Kun WANG
PY - 2018
DO - 10.1587/transinf.2018EDL8148
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E101-D
IS - 11
JA - IEICE TRANSACTIONS on Information
Y1 - November 2018
AB - High-performance computing (HPC) has penetrated into various research fields, yet the increase in computing power is limited by conventional electrical interconnections. The proposed architecture, NEST, exploits wavelength routing in arrayed waveguide grating routers (AWGRs) to achieve a scalable, low-latency, and high-throughput network. For the intra pod and inter pod communication, the symmetrical topology of NEST reduces the network diameter, which leads to an increase in latency performance. Moreover, the proposed architecture enables exponential growth of network size. Simulation results demonstrate that NEST shows 36% latency improvement and 30% throughput improvement over the dragonfly on an average.
ER -