The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Dans cet article, nous considérons la conception pour la testabilité d'un multiplicateur basé sur l'algorithme de Booth modifié. Tout d’abord, nous présentons une implémentation de base du multiplicateur dans un tableau. Ensuite, nous introduisons des considérations de testabilité pour dériver deux conceptions testables en C. La première des conceptions est testable en C sous le modèle unique bloqué en panne (SAF) avec 10 modèles de test. Et le second est testable en C selon le modèle de défaillance cellulaire (CFM) avec 33 modèles de test.
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Kwame Osei BOATENG, Hiroshi TAKAHASHI, Yuzo TAKAMATSU, "Design of C-Testable Modified-Booth Multipliers" in IEICE TRANSACTIONS on Information,
vol. E83-D, no. 10, pp. 1868-1878, October 2000, doi: .
Abstract: In this paper, we consider the design for testability of a multiplier based on the modified Booth Algorithm. First, we present a basic array implementation of the multiplier. Next, we introduce testability considerations to derive two C-testable designs. The first of the designs is C-testable under the single stuck-at fault model (SAF) with 10 test patterns. And, the second is C-testable under the cell fault model (CFM) with 33 test patterns.
URL: https://global.ieice.org/en_transactions/information/10.1587/e83-d_10_1868/_p
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@ARTICLE{e83-d_10_1868,
author={Kwame Osei BOATENG, Hiroshi TAKAHASHI, Yuzo TAKAMATSU, },
journal={IEICE TRANSACTIONS on Information},
title={Design of C-Testable Modified-Booth Multipliers},
year={2000},
volume={E83-D},
number={10},
pages={1868-1878},
abstract={In this paper, we consider the design for testability of a multiplier based on the modified Booth Algorithm. First, we present a basic array implementation of the multiplier. Next, we introduce testability considerations to derive two C-testable designs. The first of the designs is C-testable under the single stuck-at fault model (SAF) with 10 test patterns. And, the second is C-testable under the cell fault model (CFM) with 33 test patterns.},
keywords={},
doi={},
ISSN={},
month={October},}
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TY - JOUR
TI - Design of C-Testable Modified-Booth Multipliers
T2 - IEICE TRANSACTIONS on Information
SP - 1868
EP - 1878
AU - Kwame Osei BOATENG
AU - Hiroshi TAKAHASHI
AU - Yuzo TAKAMATSU
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E83-D
IS - 10
JA - IEICE TRANSACTIONS on Information
Y1 - October 2000
AB - In this paper, we consider the design for testability of a multiplier based on the modified Booth Algorithm. First, we present a basic array implementation of the multiplier. Next, we introduce testability considerations to derive two C-testable designs. The first of the designs is C-testable under the single stuck-at fault model (SAF) with 10 test patterns. And, the second is C-testable under the cell fault model (CFM) with 33 test patterns.
ER -