The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Cet article présente un cadre de mise en œuvre d'un récepteur multimode entièrement numérique utilisant la conversion directe RF-numérique. Dans cette architecture, la bande entière, y compris plusieurs systèmes RF, est directement convertie en numérique par un CAN large bande haute vitesse, et les systèmes RF peuvent être facilement commutés uniquement par traitement du signal numérique avec le minimum de composants RF analogiques. Le frontal RF numérique se compose de blocs de traitement parallèles pour les flux de données parallèles en tenant compte de la configuration pratique de l'ADC. Les signaux RF sont convertis en bande de base via un étage IF numérique et les débits de données sont réduits par deux étapes de décimation. Dans cet article, une étude de principe sur la mise en œuvre d’un système bimode est présentée par souci de simplicité. Les ressources du circuit et la robustesse aux parasites (sorties parasites) d'un NCO (oscillateur à commande numérique) dans la conception proposée seront présentées. L'architecture proposée a été implémentée avec un FPGA sur le système prototype développé et les opérations ont également été vérifiées.
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Minseok KIM, Takayuki MOTEKI, Koichi ICHIGE, Hiroyuki ARAI, "Efficient Heterodyne Digital Receiver with Direct RF-to-Digital Conversion for Software Defined Radio" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 4, pp. 1056-1062, April 2009, doi: 10.1587/transfun.E92.A.1056.
Abstract: This paper presents a framework of multimode fully digital receiver implementation using direct RF-to-digital conversion. In this architecture the entire band including multiple RF systems is directly converted to digital by a wideband high speed ADC, and the RF systems can be easily switched by only digital signal processing with the minimum analog RF components. The digital RF front-end consists of parallel processing blocks for parallel data streams considering practical ADC's configuration. The RF signals are converted into baseband through digital IF stage and the data rates are made down by two steps of decimation. In this paper, a principle investigation into a dualmode system implementation is presented for simplicity. The circuit resource and the robustness to the spurs (spurious outputs) of an NCO (numerically controlled oscillator) in the proposed design will be presented. The proposed architecture was implemented with an FPGA on the developed prototype system and the operations were also verified.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.1056/_p
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@ARTICLE{e92-a_4_1056,
author={Minseok KIM, Takayuki MOTEKI, Koichi ICHIGE, Hiroyuki ARAI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Efficient Heterodyne Digital Receiver with Direct RF-to-Digital Conversion for Software Defined Radio},
year={2009},
volume={E92-A},
number={4},
pages={1056-1062},
abstract={This paper presents a framework of multimode fully digital receiver implementation using direct RF-to-digital conversion. In this architecture the entire band including multiple RF systems is directly converted to digital by a wideband high speed ADC, and the RF systems can be easily switched by only digital signal processing with the minimum analog RF components. The digital RF front-end consists of parallel processing blocks for parallel data streams considering practical ADC's configuration. The RF signals are converted into baseband through digital IF stage and the data rates are made down by two steps of decimation. In this paper, a principle investigation into a dualmode system implementation is presented for simplicity. The circuit resource and the robustness to the spurs (spurious outputs) of an NCO (numerically controlled oscillator) in the proposed design will be presented. The proposed architecture was implemented with an FPGA on the developed prototype system and the operations were also verified.},
keywords={},
doi={10.1587/transfun.E92.A.1056},
ISSN={1745-1337},
month={April},}
Copier
TY - JOUR
TI - Efficient Heterodyne Digital Receiver with Direct RF-to-Digital Conversion for Software Defined Radio
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1056
EP - 1062
AU - Minseok KIM
AU - Takayuki MOTEKI
AU - Koichi ICHIGE
AU - Hiroyuki ARAI
PY - 2009
DO - 10.1587/transfun.E92.A.1056
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 4
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - April 2009
AB - This paper presents a framework of multimode fully digital receiver implementation using direct RF-to-digital conversion. In this architecture the entire band including multiple RF systems is directly converted to digital by a wideband high speed ADC, and the RF systems can be easily switched by only digital signal processing with the minimum analog RF components. The digital RF front-end consists of parallel processing blocks for parallel data streams considering practical ADC's configuration. The RF signals are converted into baseband through digital IF stage and the data rates are made down by two steps of decimation. In this paper, a principle investigation into a dualmode system implementation is presented for simplicity. The circuit resource and the robustness to the spurs (spurious outputs) of an NCO (numerically controlled oscillator) in the proposed design will be presented. The proposed architecture was implemented with an FPGA on the developed prototype system and the operations were also verified.
ER -