The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Une méthode de conception du différentiel N-un filtre de chemin avec calcul d'échantillonnage est proposé. Il permet de réduire l'échelle de l'ensemble du filtre d'environ la moitié pour une réalisation plus facile. De plus, la méthode proposée offre la possibilité d’éliminer les bandes passantes harmoniques de la fréquence d’horloge et d’augmenter la réjection des harmoniques. En utilisant la méthode proposée, les travaux antérieurs impliquant un filtre à 8 chemins peuvent être réduits à 5 chemins. Le filtre différentiel à 5 voies proposé réduit l'échelle du circuit tout en offrant les performances d'un filtre à 10 voies issu de travaux antérieurs. Un exemple de filtre différentiel à 7 trajets utilisant la même méthode de conception proposée est également présenté en comparaison avec le filtre différentiel à 5 trajets. Le filtre différentiel à 7 voies offre la possibilité d'éliminer toutes les bandes passantes inférieures à 10 fois la fréquence d'horloge avec un compromis d'augmentation de l'échelle du circuit.
Zi Hao ONG
University of Yamanashi
Takahide SATO
University of Yamanashi
Satomi OGAWA
University of Yamanashi
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Zi Hao ONG, Takahide SATO, Satomi OGAWA, "Circuit Scale Reduced N-Path Filters with Sampling Computation for Increased Harmonic Passband Rejection" in IEICE TRANSACTIONS on Fundamentals,
vol. E102-A, no. 1, pp. 219-226, January 2019, doi: 10.1587/transfun.E102.A.219.
Abstract: A design method of the differential N-path filter with sampling computation is proposed. It enables the scale of the whole filter to be reduced by approximately half for easier realization. On top of that, the proposed method offers the ability to eliminate the harmonic passbands of the clock frequency and an increase of harmonic rejection. By using the proposed method, previous work involving an 8-path filter can be reduced to 5-path. The proposed differential 5-path filter reduces the scale of the circuit and at the same time has the performance of a 10-path filter from previous work. An example of differential 7-path filter using the same proposed design method is also stated in comparison of the differential 5-path filter. The differential 7-path filter offers the ability to eliminate all the passbands below 10 times the clock frequency with a tradeoff of an increase in circuit scale.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E102.A.219/_p
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@ARTICLE{e102-a_1_219,
author={Zi Hao ONG, Takahide SATO, Satomi OGAWA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Circuit Scale Reduced N-Path Filters with Sampling Computation for Increased Harmonic Passband Rejection},
year={2019},
volume={E102-A},
number={1},
pages={219-226},
abstract={A design method of the differential N-path filter with sampling computation is proposed. It enables the scale of the whole filter to be reduced by approximately half for easier realization. On top of that, the proposed method offers the ability to eliminate the harmonic passbands of the clock frequency and an increase of harmonic rejection. By using the proposed method, previous work involving an 8-path filter can be reduced to 5-path. The proposed differential 5-path filter reduces the scale of the circuit and at the same time has the performance of a 10-path filter from previous work. An example of differential 7-path filter using the same proposed design method is also stated in comparison of the differential 5-path filter. The differential 7-path filter offers the ability to eliminate all the passbands below 10 times the clock frequency with a tradeoff of an increase in circuit scale.},
keywords={},
doi={10.1587/transfun.E102.A.219},
ISSN={1745-1337},
month={January},}
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TY - JOUR
TI - Circuit Scale Reduced N-Path Filters with Sampling Computation for Increased Harmonic Passband Rejection
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 219
EP - 226
AU - Zi Hao ONG
AU - Takahide SATO
AU - Satomi OGAWA
PY - 2019
DO - 10.1587/transfun.E102.A.219
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E102-A
IS - 1
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - January 2019
AB - A design method of the differential N-path filter with sampling computation is proposed. It enables the scale of the whole filter to be reduced by approximately half for easier realization. On top of that, the proposed method offers the ability to eliminate the harmonic passbands of the clock frequency and an increase of harmonic rejection. By using the proposed method, previous work involving an 8-path filter can be reduced to 5-path. The proposed differential 5-path filter reduces the scale of the circuit and at the same time has the performance of a 10-path filter from previous work. An example of differential 7-path filter using the same proposed design method is also stated in comparison of the differential 5-path filter. The differential 7-path filter offers the ability to eliminate all the passbands below 10 times the clock frequency with a tradeoff of an increase in circuit scale.
ER -