The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Cet article décrit un amplificateur à faible bruit (LNA) sub 1 V fabriqué à l'aide d'un processus CMOS SOI (silicium sur isolant) de 0.35 µm. Les dispositifs SOI ont des performances élevées même à faible tension de fonctionnement (inférieure à 1 V) en raison de leur capacité parasite à la source et au drain plus petite que celle des MOS en masse. Un corps d'un MOSFET peut être contrôlé à l'aide d'une plaque de protection de champ (FS). Le corps du transistor du LNA est connecté à sa grille. La tension de seuil du transistor diminue en raison de l'effet de polarisation du corps, de sorte qu'un courant de drain important maintient le gain élevé et que le contrôle du corps actif améliore le point de compression du gain de 1 dB. Un gain de 7.0 dB et un facteur de bruit (NF) de 3.6 dB sont obtenus à 1.0 V et 1.9 GHz. La puissance de sortie au point de compression de gain de 1 dB est de +1.5 dBm. Le gain et la puissance de sortie au point de compression de gain de 1 dB sont respectivement supérieurs de 1.2 dB et 2.9 dB à ceux d'un LNA classiquement fixé au corps. Un gain de 5.5 dB est également obtenu à la tension d'alimentation de 0.5 V.
Hiroshi KOMURASAKI
Hisayasu SATO
Kazuya YAMAMOTO
Kimio UEDA
Shigenobu MAEDA
Yasuo YAMAGUCHI
Nagisa SASAKI
Takahiro MIKI
Yasutaka HORIBA
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Copier
Hiroshi KOMURASAKI, Hisayasu SATO, Kazuya YAMAMOTO, Kimio UEDA, Shigenobu MAEDA, Yasuo YAMAGUCHI, Nagisa SASAKI, Takahiro MIKI, Yasutaka HORIBA, "A Sub 1-V L-Band Low Noise Amplifier in SOI CMOS" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 2, pp. 220-227, February 2000, doi: .
Abstract: This paper describes a sub 1-V low noise amplifier (LNA) fabricated using a 0.35 µm SOI (silicon on insulator) CMOS process. The SOI devices have high speed performance even at low operating voltage (below 1 V) because of their smaller parasitic capacitance at source and drain than those of bulk MOSs. A body of a MOSFET can be controlled by using a field shield (FS) plate. The transistor body of the LNA is connected to its gate. The threshold voltage of the transistor becomes lower due to the body-biased effect so that a large drain current keeps the gain high, and active-body control improves the 1-dB gain compression point. A gain of 7.0 dB and a Noise Figure (NF) of 3.6 dB are obtained at 1.0 V and 1.9 GHz. The output power at the 1-dB gain compression point is +1.5 dBm. The gain and the output power at the 1-dB gain compression point are higher by 1.2 dB and 2.9 dB respectively than those of a conventionally body-fixed LNA. A 5.5 dB gain is also obtained at the supply voltage of 0.5 V.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_2_220/_p
Copier
@ARTICLE{e83-a_2_220,
author={Hiroshi KOMURASAKI, Hisayasu SATO, Kazuya YAMAMOTO, Kimio UEDA, Shigenobu MAEDA, Yasuo YAMAGUCHI, Nagisa SASAKI, Takahiro MIKI, Yasutaka HORIBA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Sub 1-V L-Band Low Noise Amplifier in SOI CMOS},
year={2000},
volume={E83-A},
number={2},
pages={220-227},
abstract={This paper describes a sub 1-V low noise amplifier (LNA) fabricated using a 0.35 µm SOI (silicon on insulator) CMOS process. The SOI devices have high speed performance even at low operating voltage (below 1 V) because of their smaller parasitic capacitance at source and drain than those of bulk MOSs. A body of a MOSFET can be controlled by using a field shield (FS) plate. The transistor body of the LNA is connected to its gate. The threshold voltage of the transistor becomes lower due to the body-biased effect so that a large drain current keeps the gain high, and active-body control improves the 1-dB gain compression point. A gain of 7.0 dB and a Noise Figure (NF) of 3.6 dB are obtained at 1.0 V and 1.9 GHz. The output power at the 1-dB gain compression point is +1.5 dBm. The gain and the output power at the 1-dB gain compression point are higher by 1.2 dB and 2.9 dB respectively than those of a conventionally body-fixed LNA. A 5.5 dB gain is also obtained at the supply voltage of 0.5 V.},
keywords={},
doi={},
ISSN={},
month={February},}
Copier
TY - JOUR
TI - A Sub 1-V L-Band Low Noise Amplifier in SOI CMOS
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 220
EP - 227
AU - Hiroshi KOMURASAKI
AU - Hisayasu SATO
AU - Kazuya YAMAMOTO
AU - Kimio UEDA
AU - Shigenobu MAEDA
AU - Yasuo YAMAGUCHI
AU - Nagisa SASAKI
AU - Takahiro MIKI
AU - Yasutaka HORIBA
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2000
AB - This paper describes a sub 1-V low noise amplifier (LNA) fabricated using a 0.35 µm SOI (silicon on insulator) CMOS process. The SOI devices have high speed performance even at low operating voltage (below 1 V) because of their smaller parasitic capacitance at source and drain than those of bulk MOSs. A body of a MOSFET can be controlled by using a field shield (FS) plate. The transistor body of the LNA is connected to its gate. The threshold voltage of the transistor becomes lower due to the body-biased effect so that a large drain current keeps the gain high, and active-body control improves the 1-dB gain compression point. A gain of 7.0 dB and a Noise Figure (NF) of 3.6 dB are obtained at 1.0 V and 1.9 GHz. The output power at the 1-dB gain compression point is +1.5 dBm. The gain and the output power at the 1-dB gain compression point are higher by 1.2 dB and 2.9 dB respectively than those of a conventionally body-fixed LNA. A 5.5 dB gain is also obtained at the supply voltage of 0.5 V.
ER -