The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Une analyse précise du courant est requise dans la conception des circuits pour analyser le taux de défaillance par électromigration, la consommation électrique, la chute de tension, etc. Un modèle de courant basé sur la charge pour les portes CMOS est présenté dans cet article. La forme d'onde actuelle d'une porte CMOS lors d'une transition se compose de trois composants : l'un se produit lorsque l'entrée change et les autres n'existent que lorsque la sortie change. Ces trois composants sont caractérisés par des impulsions triangulaires avec quatre paramètres qui peuvent être facilement obtenus après simulation temporelle. Ce modèle a été intégré à notre simulateur de synchronisation au niveau du commutateur pour générer la forme d'onde actuelle. La forme d'onde de courant simulée aide à résoudre les problèmes de fiabilité du VLSI dus à l'électromigration et aux chutes de tension excessives dans les bus d'alimentation. En comparant les résultats obtenus en utilisant SPICE avec ceux de notre modèle, nous trouvons un accord, notamment sur les moments auxquels les impulsions de courant se produisent.
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Jyh-Herng WANG, "Current Waveform Simulation for CMOS VLSI Circuits Considering Event-Overlapping" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 1, pp. 128-138, January 2000, doi: .
Abstract: Accurate current analysis is required in circuit designs to analyze electromigration failure rate, power consumption, voltage drop, and so on. A charge-based current model for CMOS gates is presented in this paper. The current waveform of a CMOS gate during a transition consists of three components: one occurs when the input changes and the others exist only when the output changes. These three components are characterized by triangular pulses with four parameters which can be easily obtained after timing simulation. This model has been embedded into our switch-level timing simulator to generate the current waveform. The simulated current waveform helps solve the VLSI reliability problems due to electromigration and excess voltage drops in the power buses. When comparing the results obtained by using SPICE with those by our model, we find agreement, especially on the time points at which current pulses occur.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_1_128/_p
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@ARTICLE{e83-a_1_128,
author={Jyh-Herng WANG, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Current Waveform Simulation for CMOS VLSI Circuits Considering Event-Overlapping},
year={2000},
volume={E83-A},
number={1},
pages={128-138},
abstract={Accurate current analysis is required in circuit designs to analyze electromigration failure rate, power consumption, voltage drop, and so on. A charge-based current model for CMOS gates is presented in this paper. The current waveform of a CMOS gate during a transition consists of three components: one occurs when the input changes and the others exist only when the output changes. These three components are characterized by triangular pulses with four parameters which can be easily obtained after timing simulation. This model has been embedded into our switch-level timing simulator to generate the current waveform. The simulated current waveform helps solve the VLSI reliability problems due to electromigration and excess voltage drops in the power buses. When comparing the results obtained by using SPICE with those by our model, we find agreement, especially on the time points at which current pulses occur.},
keywords={},
doi={},
ISSN={},
month={January},}
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TY - JOUR
TI - Current Waveform Simulation for CMOS VLSI Circuits Considering Event-Overlapping
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 128
EP - 138
AU - Jyh-Herng WANG
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 1
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - January 2000
AB - Accurate current analysis is required in circuit designs to analyze electromigration failure rate, power consumption, voltage drop, and so on. A charge-based current model for CMOS gates is presented in this paper. The current waveform of a CMOS gate during a transition consists of three components: one occurs when the input changes and the others exist only when the output changes. These three components are characterized by triangular pulses with four parameters which can be easily obtained after timing simulation. This model has been embedded into our switch-level timing simulator to generate the current waveform. The simulated current waveform helps solve the VLSI reliability problems due to electromigration and excess voltage drops in the power buses. When comparing the results obtained by using SPICE with those by our model, we find agreement, especially on the time points at which current pulses occur.
ER -