The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Les systèmes à grande vitesse nécessitent un système d'horloge à large plage de fréquences pour le traitement des données. Une boucle à verrouillage de phase (PLL) est utilisée pour un tel système qui nécessite une horloge à fréquence variable à large plage. La méthode d'étalonnage de fréquence permet à l'oscillateur commandé en tension (VCO) d'une PLL de couvrir la plage de fréquence attendue pour les applications à grande vitesse qui nécessitent une large plage de verrouillage. L'ajustement de la plage de fréquence est mis en œuvre au moyen d'un convertisseur numérique-analogique (DAC) de courant, qui contrôle les courbes de performances d'un VCO et d'un circuit de polarisation. Cette méthode ajuste les courbes de performances fréquence-tension du VCO avant le fonctionnement fonctionnel afin qu'une PLL puisse couvrir la plage de fréquences demandée dans ses meilleures conditions. La limite de la tension de commande et sa tension de référence cible sont données avec la même référence de tension. Cela garantit des performances correctes après le réglage de la fréquence, même en cas de fluctuation de température. Il élimine les ajustements physiques post-production tels que le coupe-fusible, ce qui augmente le coût et le TAT lors de la fabrication et des tests. Un VCO à large plage de verrouillage à grande vitesse avec un circuit d'étalonnage automatique des performances de fréquence est mis en œuvre dans un espace réduit dans un canal de disque dur à grande vitesse avec une technologie métallique à quatre couches CMOS de 0.25 µm 2.5 V.
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Takeo YASUDA, "High-Speed Wide-Locking Range VCO with Frequency Calibration" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 12, pp. 2616-2622, December 2000, doi: .
Abstract: High-speed systems require a wide-frequency-range clock system for data processing. Phase-locked loop (PLL) is used for such a system that requires wide-range variable frequency clock. Frequency calibration method enables the voltage-controlled oscillator (VCO) in a PLL to cover the expected frequency range for high-speed applications that require a wide locking range. Frequency range adjustment is implemented by means of a current digital to analog converter (DAC), which controls the performance curves of a VCO and a bias circuit. This method adjusts the VCO's frequency-voltage performance curves before functional operation so that a PLL can cover requested frequency range with its best condition. Both the limit of control voltage and its target reference voltage are given with same voltage reference. This ensures correct performance after frequency adjustment even under the temperature fluctuation. It eliminates post-production physical adjustment such as fuse trimming which increases the cost and TAT in manufacturing and testing. A high-speed wide-locking range VCO with an automatic frequency performance calibration circuit is implemented within small space in a high-speed hard disk drive channel with 0.25-µm 2.5 V CMOS four-layer metal technology.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_12_2616/_p
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@ARTICLE{e83-a_12_2616,
author={Takeo YASUDA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={High-Speed Wide-Locking Range VCO with Frequency Calibration},
year={2000},
volume={E83-A},
number={12},
pages={2616-2622},
abstract={High-speed systems require a wide-frequency-range clock system for data processing. Phase-locked loop (PLL) is used for such a system that requires wide-range variable frequency clock. Frequency calibration method enables the voltage-controlled oscillator (VCO) in a PLL to cover the expected frequency range for high-speed applications that require a wide locking range. Frequency range adjustment is implemented by means of a current digital to analog converter (DAC), which controls the performance curves of a VCO and a bias circuit. This method adjusts the VCO's frequency-voltage performance curves before functional operation so that a PLL can cover requested frequency range with its best condition. Both the limit of control voltage and its target reference voltage are given with same voltage reference. This ensures correct performance after frequency adjustment even under the temperature fluctuation. It eliminates post-production physical adjustment such as fuse trimming which increases the cost and TAT in manufacturing and testing. A high-speed wide-locking range VCO with an automatic frequency performance calibration circuit is implemented within small space in a high-speed hard disk drive channel with 0.25-µm 2.5 V CMOS four-layer metal technology.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - High-Speed Wide-Locking Range VCO with Frequency Calibration
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2616
EP - 2622
AU - Takeo YASUDA
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2000
AB - High-speed systems require a wide-frequency-range clock system for data processing. Phase-locked loop (PLL) is used for such a system that requires wide-range variable frequency clock. Frequency calibration method enables the voltage-controlled oscillator (VCO) in a PLL to cover the expected frequency range for high-speed applications that require a wide locking range. Frequency range adjustment is implemented by means of a current digital to analog converter (DAC), which controls the performance curves of a VCO and a bias circuit. This method adjusts the VCO's frequency-voltage performance curves before functional operation so that a PLL can cover requested frequency range with its best condition. Both the limit of control voltage and its target reference voltage are given with same voltage reference. This ensures correct performance after frequency adjustment even under the temperature fluctuation. It eliminates post-production physical adjustment such as fuse trimming which increases the cost and TAT in manufacturing and testing. A high-speed wide-locking range VCO with an automatic frequency performance calibration circuit is implemented within small space in a high-speed hard disk drive channel with 0.25-µm 2.5 V CMOS four-layer metal technology.
ER -