The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Cet article présente une méthode de composition de fils dans un compilateur matériel Bach. Bach synthétise les circuits de niveau RT à partir d'une description du système écrite en Bach-C langage, où un système est modélisé comme des processus communicants exécutés en parallèle. La description du système est décomposée en discussions, c'est-à-dire des chaînes de processus séquentiels, en regroupant les processus qui ne sont pas exécutés en parallèle. L'ensemble de threads est ensuite converti en modèles comportementaux VHDL et transmis à un synthétiseur comportemental. La méthode proposée tente de trouver une configuration de thread qui maximise le partage des ressources entre les processus dans les threads. Des expériences sur deux modèles réels montrent que les tailles des circuits ont été réduites de 3.7 % et 14.7 %. Nous montrons également les statistiques détaillées et l’analyse de la taille des circuits au niveau de la porte résultants.
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Mizuki TAKAHASHI, Nagisa ISHIURA, Akihisa YAMADA, Takashi KAMBE, "Thread Composition Method for Hardware Compiler Bach Maximizing Resource Sharing among Processes" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 12, pp. 2456-2463, December 2000, doi: .
Abstract: This paper presents a method of thread composition in a hardware compiler Bach. Bach synthesizes RT level circuits from a system description written in Bach-C language, where a system is modeled as communicating processes running in parallel. The system description is decomposed into threads, i.e., strings of sequential processes, by grouping processes which are not executed in parallel. The set of threads are then converted into behavioral VHDL models and passed to a behavioral synthesizer. The proposed method attempts to find a thread configuration that maximize resource sharing among processes in the threads. Experiments on two real designs show that the circuit sizes were reduced by 3.7% and 14.7%. We also show the detailed statistics and analysis of the size of the resulting gate level circuits.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_12_2456/_p
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@ARTICLE{e83-a_12_2456,
author={Mizuki TAKAHASHI, Nagisa ISHIURA, Akihisa YAMADA, Takashi KAMBE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Thread Composition Method for Hardware Compiler Bach Maximizing Resource Sharing among Processes},
year={2000},
volume={E83-A},
number={12},
pages={2456-2463},
abstract={This paper presents a method of thread composition in a hardware compiler Bach. Bach synthesizes RT level circuits from a system description written in Bach-C language, where a system is modeled as communicating processes running in parallel. The system description is decomposed into threads, i.e., strings of sequential processes, by grouping processes which are not executed in parallel. The set of threads are then converted into behavioral VHDL models and passed to a behavioral synthesizer. The proposed method attempts to find a thread configuration that maximize resource sharing among processes in the threads. Experiments on two real designs show that the circuit sizes were reduced by 3.7% and 14.7%. We also show the detailed statistics and analysis of the size of the resulting gate level circuits.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - Thread Composition Method for Hardware Compiler Bach Maximizing Resource Sharing among Processes
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2456
EP - 2463
AU - Mizuki TAKAHASHI
AU - Nagisa ISHIURA
AU - Akihisa YAMADA
AU - Takashi KAMBE
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2000
AB - This paper presents a method of thread composition in a hardware compiler Bach. Bach synthesizes RT level circuits from a system description written in Bach-C language, where a system is modeled as communicating processes running in parallel. The system description is decomposed into threads, i.e., strings of sequential processes, by grouping processes which are not executed in parallel. The set of threads are then converted into behavioral VHDL models and passed to a behavioral synthesizer. The proposed method attempts to find a thread configuration that maximize resource sharing among processes in the threads. Experiments on two real designs show that the circuit sizes were reduced by 3.7% and 14.7%. We also show the detailed statistics and analysis of the size of the resulting gate level circuits.
ER -