The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Cet article décrit une boucle à verrouillage de phase décalée (OPLL) CMOS pour un émetteur de système mondial de communications mobiles (GSM). L'OPLL est une PLL avec un mélangeur de conversion abaisseur dans le chemin de retour et est utilisée dans le chemin de transmission (Tx) comme convertisseur de fréquence. Il possède une caractéristique de filtre passe-bande de suivi de telle sorte que l'OPLL peut supprimer le bruit dans la bande de réception GSM (bruit Tx) sans duplexeur. Lorsque la bande passante de boucle de l'OPLL était de 1.0 MHz, le niveau de bruit Tx de -163.5 dBc/Hz, l'erreur de phase de 0.66
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copier
Taizo YAMAWAKI, Masaru KOKUBO, Hiroshi HAGISAWA, "A CMOS Offset Phase Locked Loop for a GSM Transmitter" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 2, pp. 307-312, February 1999, doi: .
Abstract: This paper describes a CMOS Offset Phase Locked Loop (OPLL) for a global system for mobile communications (GSM) transmitter. The OPLL is a PLL with a down-conversion mixer in the feedback path and is used in the transmit (Tx) path as a frequency converter. It has a tracking bandpass filter characteristic in such a way that the OPLL can suppress the noise in the GSM receiving band (Tx noise) without a duplexer. When the loop bandwidth of the OPLL was 1.0 MHz, the Tx noise level of -163.5 dBc/Hz, the phase error of 0.66
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_2_307/_p
Copier
@ARTICLE{e82-a_2_307,
author={Taizo YAMAWAKI, Masaru KOKUBO, Hiroshi HAGISAWA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A CMOS Offset Phase Locked Loop for a GSM Transmitter},
year={1999},
volume={E82-A},
number={2},
pages={307-312},
abstract={This paper describes a CMOS Offset Phase Locked Loop (OPLL) for a global system for mobile communications (GSM) transmitter. The OPLL is a PLL with a down-conversion mixer in the feedback path and is used in the transmit (Tx) path as a frequency converter. It has a tracking bandpass filter characteristic in such a way that the OPLL can suppress the noise in the GSM receiving band (Tx noise) without a duplexer. When the loop bandwidth of the OPLL was 1.0 MHz, the Tx noise level of -163.5 dBc/Hz, the phase error of 0.66
keywords={},
doi={},
ISSN={},
month={February},}
Copier
TY - JOUR
TI - A CMOS Offset Phase Locked Loop for a GSM Transmitter
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 307
EP - 312
AU - Taizo YAMAWAKI
AU - Masaru KOKUBO
AU - Hiroshi HAGISAWA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 1999
AB - This paper describes a CMOS Offset Phase Locked Loop (OPLL) for a global system for mobile communications (GSM) transmitter. The OPLL is a PLL with a down-conversion mixer in the feedback path and is used in the transmit (Tx) path as a frequency converter. It has a tracking bandpass filter characteristic in such a way that the OPLL can suppress the noise in the GSM receiving band (Tx noise) without a duplexer. When the loop bandwidth of the OPLL was 1.0 MHz, the Tx noise level of -163.5 dBc/Hz, the phase error of 0.66
ER -