The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
La diaphonie entre les circuits numériques et les circuits analogiques peut être à l'origine d'échecs de fonctionnement dans les LSI mixtes analogique-numérique. Cet article décrit les techniques de modélisation et les stratégies de simulation du bruit de couplage du substrat. Un modèle macroscopique de bruit de substrat qui exprime le bruit en fonction des fréquences de transition d'état logique entre les blocs numériques est proposé. Un système de simulation basé sur le modèle est mis en œuvre dans l'environnement de simulation de signaux mixtes, où la dégradation des performances du ΔΣADC de 2e ordre couplée à des sources de bruit numériques est clairement simulée. Ces résultats indiquent que l'approche de modélisation comportementale proposée permet des mesures de simulation du bruit du substrat de puce complète.
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Makoto NAGATA, Atsushi IWATA, "Substrate Noise Simulation Techniques for Analog-Digital Mixed LSI Design" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 2, pp. 271-278, February 1999, doi: .
Abstract: Crosstalk from digital to analog circuits can be causative of operation fails in analog-digital mixed LSIs. This paper describes modeling techniques and simulation strategies of the substrate coupling noise. A macroscopic substrate noise model that expresses the noise as a function of logic state transition frequencies among digital blocks is proposed. A simulation system based on the model is implemented in the mixed signal simulation environment, where performance degradation of the 2nd order ΔΣADC coupled to digital noise sources is clearly simulated. These results indicate that the proposed behavioral modeling approach allows practicable full chip substrate noise simulation measures.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_2_271/_p
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@ARTICLE{e82-a_2_271,
author={Makoto NAGATA, Atsushi IWATA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Substrate Noise Simulation Techniques for Analog-Digital Mixed LSI Design},
year={1999},
volume={E82-A},
number={2},
pages={271-278},
abstract={Crosstalk from digital to analog circuits can be causative of operation fails in analog-digital mixed LSIs. This paper describes modeling techniques and simulation strategies of the substrate coupling noise. A macroscopic substrate noise model that expresses the noise as a function of logic state transition frequencies among digital blocks is proposed. A simulation system based on the model is implemented in the mixed signal simulation environment, where performance degradation of the 2nd order ΔΣADC coupled to digital noise sources is clearly simulated. These results indicate that the proposed behavioral modeling approach allows practicable full chip substrate noise simulation measures.},
keywords={},
doi={},
ISSN={},
month={February},}
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TY - JOUR
TI - Substrate Noise Simulation Techniques for Analog-Digital Mixed LSI Design
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 271
EP - 278
AU - Makoto NAGATA
AU - Atsushi IWATA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 1999
AB - Crosstalk from digital to analog circuits can be causative of operation fails in analog-digital mixed LSIs. This paper describes modeling techniques and simulation strategies of the substrate coupling noise. A macroscopic substrate noise model that expresses the noise as a function of logic state transition frequencies among digital blocks is proposed. A simulation system based on the model is implemented in the mixed signal simulation environment, where performance degradation of the 2nd order ΔΣADC coupled to digital noise sources is clearly simulated. These results indicate that the proposed behavioral modeling approach allows practicable full chip substrate noise simulation measures.
ER -