The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
La plupart des codes correcteurs d'erreurs appliqués aux systèmes DS/SS sont tels que les données d'information sont d'abord codées (bit par bit), puis diffusées par une séquence de pseudo-bruit (PN). Ainsi, le gain de codage obtenu par de tels systèmes est principalement dû aux codes correcteurs d'erreurs et la redondance produite par les codes d'étalement ne montre aucun effet sur le gain de codage. Dans cet article, un codage Turbo puce par puce pour les systèmes DS/SS est proposé. Les données d'informations d'entrée sont d'abord réparties par séquence PN, puis introduites dans le turbo-encodeur qui fonctionne selon la synchronisation des puces. Comme le turbo-encodeur fonctionne en synchronisation de puce, une grande taille d'entrelacement serait obtenue, ce qui améliore les performances. En conséquence, des performances supérieures avec un gain de codage de plus de 3.0 dB et 5.0 dB pour les canaux AWGN et Rayleigh, respectivement, ont été trouvées avec une taille de trame courte de données d'information.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copier
Chen ZHENG, Takaya YAMAZATO, Masaaki KATAYAMA, Akira OGAWA, "Chip-by-Chip Turbo Coding for DS/SS Systems" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 12, pp. 2751-2757, December 1999, doi: .
Abstract: Most of error correcting codes applying to DS/SS systems are such that information data is first (bit-by-bit) encoded and then spread by pseudo noise (PN) sequence. Thus, coding gain achieved by such systems are mainly due to the error correcting codes and the redundancy produced by the spreading codes shows no effect on the coding gain. In this paper, a chip-by-chip Turbo coding for DS/SS systems is proposed. The input information data is first spread by PN sequence and then fed into the Turbo-encoder which operates in chip timing. As the Turbo-encoder operates in chip timing, a large interleaving size would be obtained, which improves the performance. As results, superior performances with coding gain of more than 3.0 dB and 5.0 dB for AWGN and Rayleigh-fading channel, respectively, were found with short frame size of information data.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_12_2751/_p
Copier
@ARTICLE{e82-a_12_2751,
author={Chen ZHENG, Takaya YAMAZATO, Masaaki KATAYAMA, Akira OGAWA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Chip-by-Chip Turbo Coding for DS/SS Systems},
year={1999},
volume={E82-A},
number={12},
pages={2751-2757},
abstract={Most of error correcting codes applying to DS/SS systems are such that information data is first (bit-by-bit) encoded and then spread by pseudo noise (PN) sequence. Thus, coding gain achieved by such systems are mainly due to the error correcting codes and the redundancy produced by the spreading codes shows no effect on the coding gain. In this paper, a chip-by-chip Turbo coding for DS/SS systems is proposed. The input information data is first spread by PN sequence and then fed into the Turbo-encoder which operates in chip timing. As the Turbo-encoder operates in chip timing, a large interleaving size would be obtained, which improves the performance. As results, superior performances with coding gain of more than 3.0 dB and 5.0 dB for AWGN and Rayleigh-fading channel, respectively, were found with short frame size of information data.},
keywords={},
doi={},
ISSN={},
month={December},}
Copier
TY - JOUR
TI - Chip-by-Chip Turbo Coding for DS/SS Systems
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2751
EP - 2757
AU - Chen ZHENG
AU - Takaya YAMAZATO
AU - Masaaki KATAYAMA
AU - Akira OGAWA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 1999
AB - Most of error correcting codes applying to DS/SS systems are such that information data is first (bit-by-bit) encoded and then spread by pseudo noise (PN) sequence. Thus, coding gain achieved by such systems are mainly due to the error correcting codes and the redundancy produced by the spreading codes shows no effect on the coding gain. In this paper, a chip-by-chip Turbo coding for DS/SS systems is proposed. The input information data is first spread by PN sequence and then fed into the Turbo-encoder which operates in chip timing. As the Turbo-encoder operates in chip timing, a large interleaving size would be obtained, which improves the performance. As results, superior performances with coding gain of more than 3.0 dB and 5.0 dB for AWGN and Rayleigh-fading channel, respectively, were found with short frame size of information data.
ER -