The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
RSPICE, un simulateur de synchronisation rapide pour les grands circuits MOS numériques, est présenté dans cet article. Un nouveau modèle de transistor MOS linéaire par région basé sur une table et la solution analytique de la primitive de sous-circuit générique sont appliqués pour calculer la réponse transitoire des circuits MOS numériques. L'effet de corps des transistors passants est inclus dans le modèle MOS et le réseau de condensateurs flottants peut également être géré par cette primitive de sous-circuit. Dans RSPICE, les transistors MOS avec un chemin CC sont regroupés dans un bloc connecté en CC (DCCB), et les DCCB avec un chemin de rétroaction sont combinés en un composant fortement connecté (SCC). RSPICE ordonne les SCC à l'aide de l'algorithme de Tarjan et simule les SCC ordonnés un par un. Les DCCB sont des cellules de base dans RSPICE et tout DCCB peut être mappé dans une ou plusieurs primitives de sous-circuit. Afin de calculer analytiquement la réponse transitoire de ces primitives, RSPICE approxime les signaux d'entrée de la primitive par des fonctions linéaires par morceaux. Pour compromettre la précision et la durée d'exécution de la simulation, une forme d'onde partielle et une convergence temporelle partielle (PWPTC) combinées à une technique de fenêtrage dynamique sont appliquées pour simuler les SCC. D'autres problèmes clés de RSPICE, tels que la partition des circuits, le traitement des transistors passants et des condensateurs flottants, le contrôle du flux de simulation et la modification de la forme d'onde, sont également abordés en détail. Par rapport à HSPICE, le résultat de la simulation de RSPICE est très précis avec une erreur inférieure à 3 %, mais la vitesse est de 1 à 2 ordres par rapport à HSPICE.
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Xia CAI, Huazhong YANG, Yaowei JIA, Hui WANG, "RSPICE: A Fast and Robust Timing Simulator for Digital MOS VLSI" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 11, pp. 2492-2498, November 1999, doi: .
Abstract: RSPICE, a fast timing simulator for large digital MOS circuits, is presented in this paper. A new table-based region-wise linear MOS transistor model and the analytical solution of the generic sub-circuit primitive are applied to calculate the transient response of digital MOS circuits. The body effect of pass transistors is included in the MOS model and the floating capacitor network can be handled by this sub-circuit primitive as well. In RSPICE, MOS transistors with a DC path are grouped into a DC-connected block (DCCB), and DCCBs with a feedback path are combined as a strongly connected component (SCC). RSPICE orders SCCs by Tarjan's algorithm and simulates ordered SCCs one by one. DCCBs are basic cells in RSPICE and any DCCB can be mapped into one or more sub-circuit primitives. In order to calculate the transient response of these primitives analytically, RSPICE approximates the input signals of the primitive by piecewise linear functions. To compromise the simulation accuracy and run time, partial waveform and partial time convergent (PWPTC) combined with dynamic windowing technique is applied to simulate SCCs. Other key issues of RSPICE, such as circuit partition, pass-transistor and floating-capacitor processing, simulation-flow control and waveform modification are also discussed in detail. Compared with HSPICE , the simulation result of RSPICE is very accurate with an error less than 3%, but the speed is 1-2 orders over HSPICE.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_11_2492/_p
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@ARTICLE{e82-a_11_2492,
author={Xia CAI, Huazhong YANG, Yaowei JIA, Hui WANG, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={RSPICE: A Fast and Robust Timing Simulator for Digital MOS VLSI},
year={1999},
volume={E82-A},
number={11},
pages={2492-2498},
abstract={RSPICE, a fast timing simulator for large digital MOS circuits, is presented in this paper. A new table-based region-wise linear MOS transistor model and the analytical solution of the generic sub-circuit primitive are applied to calculate the transient response of digital MOS circuits. The body effect of pass transistors is included in the MOS model and the floating capacitor network can be handled by this sub-circuit primitive as well. In RSPICE, MOS transistors with a DC path are grouped into a DC-connected block (DCCB), and DCCBs with a feedback path are combined as a strongly connected component (SCC). RSPICE orders SCCs by Tarjan's algorithm and simulates ordered SCCs one by one. DCCBs are basic cells in RSPICE and any DCCB can be mapped into one or more sub-circuit primitives. In order to calculate the transient response of these primitives analytically, RSPICE approximates the input signals of the primitive by piecewise linear functions. To compromise the simulation accuracy and run time, partial waveform and partial time convergent (PWPTC) combined with dynamic windowing technique is applied to simulate SCCs. Other key issues of RSPICE, such as circuit partition, pass-transistor and floating-capacitor processing, simulation-flow control and waveform modification are also discussed in detail. Compared with HSPICE , the simulation result of RSPICE is very accurate with an error less than 3%, but the speed is 1-2 orders over HSPICE.},
keywords={},
doi={},
ISSN={},
month={November},}
Copier
TY - JOUR
TI - RSPICE: A Fast and Robust Timing Simulator for Digital MOS VLSI
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2492
EP - 2498
AU - Xia CAI
AU - Huazhong YANG
AU - Yaowei JIA
AU - Hui WANG
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 1999
AB - RSPICE, a fast timing simulator for large digital MOS circuits, is presented in this paper. A new table-based region-wise linear MOS transistor model and the analytical solution of the generic sub-circuit primitive are applied to calculate the transient response of digital MOS circuits. The body effect of pass transistors is included in the MOS model and the floating capacitor network can be handled by this sub-circuit primitive as well. In RSPICE, MOS transistors with a DC path are grouped into a DC-connected block (DCCB), and DCCBs with a feedback path are combined as a strongly connected component (SCC). RSPICE orders SCCs by Tarjan's algorithm and simulates ordered SCCs one by one. DCCBs are basic cells in RSPICE and any DCCB can be mapped into one or more sub-circuit primitives. In order to calculate the transient response of these primitives analytically, RSPICE approximates the input signals of the primitive by piecewise linear functions. To compromise the simulation accuracy and run time, partial waveform and partial time convergent (PWPTC) combined with dynamic windowing technique is applied to simulate SCCs. Other key issues of RSPICE, such as circuit partition, pass-transistor and floating-capacitor processing, simulation-flow control and waveform modification are also discussed in detail. Compared with HSPICE , the simulation result of RSPICE is very accurate with an error less than 3%, but the speed is 1-2 orders over HSPICE.
ER -