The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Linéariseur analogique de prédistorsion employant une radiofréquence (RF) un transistor doté d'un circuit de commande de polarisation à base autonome est proposé. Le circuit de contrôle de polarisation de base automatique extrait l'enveloppe de l'entrée modulée RF signal de la RF transistor et contrôle automatiquement son courant de base en fonction de l'enveloppe extraite. En conséquence, le linéariseur proposé réalise un écart de gain positif à un niveau de puissance d’entrée élevé. En ajoutant une résistance entre le RF transistor et le circuit de contrôle de polarisation de base automatique, l'écart de gain négatif peut être dérivé. La conception du linéaiseur proposé est décrite en tenant compte de la réponse en fréquence de l'enveloppe du circuit de commande de polarisation de base automatique. Le linéariseur fabriqué atteint le taux de fuite de puissance du canal adjacent (ACLR) amélioration de 8.1 dB pour un amplificateur haute puissance GaAs FET de classe 2 W dans la bande 10 GHz (HPA) avec un écart de gain négatif pour les stations de base W-CDMA. Il atteint également le ACLR amélioration de 8.3 dB pour un LDMOS HPA avec écart de gain positif pour la même application.
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Shintaro SHINJO, Kazutomi MORI, Keiki YAMADA, Noriharu SUEMATSU, Mitsuhiro SHIMOZAWA, "Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 7, pp. 966-974, July 2010, doi: 10.1587/transele.E93.C.966.
Abstract: An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.966/_p
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@ARTICLE{e93-c_7_966,
author={Shintaro SHINJO, Kazutomi MORI, Keiki YAMADA, Noriharu SUEMATSU, Mitsuhiro SHIMOZAWA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier},
year={2010},
volume={E93-C},
number={7},
pages={966-974},
abstract={An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.},
keywords={},
doi={10.1587/transele.E93.C.966},
ISSN={1745-1353},
month={July},}
Copier
TY - JOUR
TI - Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier
T2 - IEICE TRANSACTIONS on Electronics
SP - 966
EP - 974
AU - Shintaro SHINJO
AU - Kazutomi MORI
AU - Keiki YAMADA
AU - Noriharu SUEMATSU
AU - Mitsuhiro SHIMOZAWA
PY - 2010
DO - 10.1587/transele.E93.C.966
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2010
AB - An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.
ER -