The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Une méthode flexible de désintégration du bruit pour les mesures micro-ondes sur tranche de MOSFET en silicium est présentée dans cette étude. Nous utilisons les structures factices ouvertes, courtes et traversantes pour soustraire les effets parasites des plages de sonde et des interconnexions d'un transistor MOS installé. La norme thru est utilisée pour extraire les paramètres d'interconnexion afin de soustraire les parasites d'interconnexion dans les bornes de grille, de drain et de source du MOSFET. Les parasites de la jambe pendante dans le terminal source sont également modélisés et pris en compte dans la procédure de désintégration du bruit. Les transistors MOS et les structures factices de désintégration ont été fabriqués selon un processus CMOS standard et caractérisés jusqu'à 20 GHz. Par rapport aux méthodes conventionnelles de désintégration, la technique proposée est précise et efficace en termes de surface.
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Yueh-Hua WANG, Ming-Hsiang CHO, Lin-Kun WU, "A Flexible Microwave De-Embedding Method for On-Wafer Noise Parameter Characterization of MOSFETs" in IEICE TRANSACTIONS on Electronics,
vol. E92-C, no. 9, pp. 1157-1162, September 2009, doi: 10.1587/transele.E92.C.1157.
Abstract: A flexible noise de-embedding method for on-wafer microwave measurements of silicon MOSFETs is presented in this study. We use the open, short, and thru dummy structures to subtract the parasitic effects from the probe pads and interconnects of a fixtured MOS transistor. The thru standard are used to extract the interconnect parameters for subtracting the interconnect parasitics in gate, drain, and source terminals of the MOSFET. The parasitics of the dangling leg in the source terminal are also modeled and taken into account in the noise de-embedding procedure. The MOS transistors and de-embedding dummy structures were fabricated in a standard CMOS process and characterized up to 20 GHz. Compared with the conventional de-embedding methods, the proposed technique is accurate and area-efficient.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E92.C.1157/_p
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@ARTICLE{e92-c_9_1157,
author={Yueh-Hua WANG, Ming-Hsiang CHO, Lin-Kun WU, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Flexible Microwave De-Embedding Method for On-Wafer Noise Parameter Characterization of MOSFETs},
year={2009},
volume={E92-C},
number={9},
pages={1157-1162},
abstract={A flexible noise de-embedding method for on-wafer microwave measurements of silicon MOSFETs is presented in this study. We use the open, short, and thru dummy structures to subtract the parasitic effects from the probe pads and interconnects of a fixtured MOS transistor. The thru standard are used to extract the interconnect parameters for subtracting the interconnect parasitics in gate, drain, and source terminals of the MOSFET. The parasitics of the dangling leg in the source terminal are also modeled and taken into account in the noise de-embedding procedure. The MOS transistors and de-embedding dummy structures were fabricated in a standard CMOS process and characterized up to 20 GHz. Compared with the conventional de-embedding methods, the proposed technique is accurate and area-efficient.},
keywords={},
doi={10.1587/transele.E92.C.1157},
ISSN={1745-1353},
month={September},}
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TY - JOUR
TI - A Flexible Microwave De-Embedding Method for On-Wafer Noise Parameter Characterization of MOSFETs
T2 - IEICE TRANSACTIONS on Electronics
SP - 1157
EP - 1162
AU - Yueh-Hua WANG
AU - Ming-Hsiang CHO
AU - Lin-Kun WU
PY - 2009
DO - 10.1587/transele.E92.C.1157
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E92-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 2009
AB - A flexible noise de-embedding method for on-wafer microwave measurements of silicon MOSFETs is presented in this study. We use the open, short, and thru dummy structures to subtract the parasitic effects from the probe pads and interconnects of a fixtured MOS transistor. The thru standard are used to extract the interconnect parameters for subtracting the interconnect parasitics in gate, drain, and source terminals of the MOSFET. The parasitics of the dangling leg in the source terminal are also modeled and taken into account in the noise de-embedding procedure. The MOS transistors and de-embedding dummy structures were fabricated in a standard CMOS process and characterized up to 20 GHz. Compared with the conventional de-embedding methods, the proposed technique is accurate and area-efficient.
ER -