The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Dans cet article, un convertisseur temps-numérique dans lequel la sortie numérique est obtenue sans temps de retard est proposé. Le circuit se compose d’un convertisseur temps-tension, d’un convertisseur tension-fréquence et d’un compteur. Dans le convertisseur temps-tension, un condensateur est chargé d'un courant constant pendant l'intervalle de temps d'entrée. La variation de la tension du condensateur est proportionnelle au temps d'entrée et la tension du condensateur peut être convertie en un signal d'impulsion avec le convertisseur tension-fréquence. La fréquence du signal d'impulsion est directement proportionnelle à la tension maximale du condensateur et les signaux d'impulsion sont comptés pour obtenir la sortie numérique. Dans le circuit proposé, l'intervalle de temps d'entrée peut être facilement contrôlé et la résolution de la sortie numérique peut être améliorée en contrôlant les dispositifs passifs tels que le condensateur et la résistance.
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Jin-Ho CHOI, "CMOS Time-to-Digital Converter without Delay Time" in IEICE TRANSACTIONS on Electronics,
vol. E85-C, no. 5, pp. 1216-1218, May 2002, doi: .
Abstract: In this paper, a time-to-digital converter in which the digital output is obtained without delay time is proposed. The circuit consists of a time-to-voltage converter, voltage-to-frequency converter, and counter. In the time-to-voltage converter, a capacitor is charged with a constant current during the input time interval. The change in the capacitor voltage is proportional to the input time and the capacitor voltage can be converted into a pulse signal with the voltage-to-frequency converter. The frequency of the pulse signal is directly proportional to the peak capacitor voltage and the pulse signals are counted to obtain the digital output. In the proposed circuit, the input time interval can be easily controlled and the resolution of the digital output can be improved by controlling the passive devices such as the capacitor and resistor.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_5_1216/_p
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@ARTICLE{e85-c_5_1216,
author={Jin-Ho CHOI, },
journal={IEICE TRANSACTIONS on Electronics},
title={CMOS Time-to-Digital Converter without Delay Time},
year={2002},
volume={E85-C},
number={5},
pages={1216-1218},
abstract={In this paper, a time-to-digital converter in which the digital output is obtained without delay time is proposed. The circuit consists of a time-to-voltage converter, voltage-to-frequency converter, and counter. In the time-to-voltage converter, a capacitor is charged with a constant current during the input time interval. The change in the capacitor voltage is proportional to the input time and the capacitor voltage can be converted into a pulse signal with the voltage-to-frequency converter. The frequency of the pulse signal is directly proportional to the peak capacitor voltage and the pulse signals are counted to obtain the digital output. In the proposed circuit, the input time interval can be easily controlled and the resolution of the digital output can be improved by controlling the passive devices such as the capacitor and resistor.},
keywords={},
doi={},
ISSN={},
month={May},}
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TY - JOUR
TI - CMOS Time-to-Digital Converter without Delay Time
T2 - IEICE TRANSACTIONS on Electronics
SP - 1216
EP - 1218
AU - Jin-Ho CHOI
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2002
AB - In this paper, a time-to-digital converter in which the digital output is obtained without delay time is proposed. The circuit consists of a time-to-voltage converter, voltage-to-frequency converter, and counter. In the time-to-voltage converter, a capacitor is charged with a constant current during the input time interval. The change in the capacitor voltage is proportional to the input time and the capacitor voltage can be converted into a pulse signal with the voltage-to-frequency converter. The frequency of the pulse signal is directly proportional to the peak capacitor voltage and the pulse signals are counted to obtain the digital output. In the proposed circuit, the input time interval can be easily controlled and the resolution of the digital output can be improved by controlling the passive devices such as the capacitor and resistor.
ER -