The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Une méthode efficace de modélisation de grands signaux du FET utilisant l'analyse de ligne de charge est proposée et appliquée à la caractérisation non linéaire du FET. Dans cette méthode, la tension drain-source instantanée Vds(t) et courant drain-source Ids(t) les formes d'onde sont déterminées par analyse de ligne de charge tandis que les paramètres non linéaires dans un circuit équivalent à grand signal de FET sont définis comme les valeurs moyennes sur une période correspondant à la valeur instantanée Vds(t) et Ids(t). Puissance de sortie (Pande), efficacité énergétique ajoutée (ηajouter), et l'écart de phase calculé à l'aide d'un tel circuit équivalent de FET concordent bien avec les résultats mesurés à 933.5 MHz. Le mécanisme de déviation de phase est expliqué sur la base du circuit équivalent à grand signal du FET, et il est montré comment les paramètres non linéaires, tels que la transconductance (gm), résistance drain-source (Rds), capacité grille-source (Cgs) et la résistance aux fuites du portail (Rig) contribuent aux écarts de phase positifs ou négatifs. La différence entre un petit signal et un grand signal S-paramètres (S11, S12, S21, S22) est également discuté. La méthode de modélisation de grands signaux proposée est considérée comme utile pour la conception d'amplificateurs à haute puissance, à haut rendement et à faible distorsion, ainsi que pour l'étude du comportement du FET dans des conditions de fonctionnement à grands signaux.
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Yukio IKEDA, Kazutomi MORI, Masatoshi NAKAYAMA, Yasushi ITOH, Osami ISHIDA, Tadashi TAKAGI, "An Efficient Large-Signal Modeling Method Using Load-Line Analysis and Its Application to Non-linear Characterization of FET" in IEICE TRANSACTIONS on Electronics,
vol. E84-C, no. 7, pp. 875-880, July 2001, doi: .
Abstract: An efficient large-signal modeling method of FET using load-line analysis is proposed, and it is applied to non-linear characterization of FET. In this method, instantaneous drain-source voltage Vds(t) and drain-source current Ids(t) waveforms are determined by load-line analysis while non-linear parameters in a large-signal equivalent circuit of FET are defined as the average values over one period corresponding to instantaneous Vds(t) and Ids(t). Output power (Pout), power added efficiency (ηadd), and phase deviation calculated by using such an equivalent circuit of FET agree well with the measured results at 933.5 MHz. Phase deviation mechanism is explained based on the large-signal equivalent circuit of FET, and it is shown how non-linear parameters, such as trans-conductance (gm), drain-source resistance (Rds), gate-source capacitance (Cgs), and gate leak resistance (Rig) contribute to positive or negative phase deviations. The difference between small-signal and large-signal S-parameters (S11, S12, S21, S22) is also discussed. The proposed large-signal modeling method is considered to be useful for the design of high power, high efficiency, and low distortion amplifiers as well as the investigation of the behavior of FET in large-signal operating conditions.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e84-c_7_875/_p
Copier
@ARTICLE{e84-c_7_875,
author={Yukio IKEDA, Kazutomi MORI, Masatoshi NAKAYAMA, Yasushi ITOH, Osami ISHIDA, Tadashi TAKAGI, },
journal={IEICE TRANSACTIONS on Electronics},
title={An Efficient Large-Signal Modeling Method Using Load-Line Analysis and Its Application to Non-linear Characterization of FET},
year={2001},
volume={E84-C},
number={7},
pages={875-880},
abstract={An efficient large-signal modeling method of FET using load-line analysis is proposed, and it is applied to non-linear characterization of FET. In this method, instantaneous drain-source voltage Vds(t) and drain-source current Ids(t) waveforms are determined by load-line analysis while non-linear parameters in a large-signal equivalent circuit of FET are defined as the average values over one period corresponding to instantaneous Vds(t) and Ids(t). Output power (Pout), power added efficiency (ηadd), and phase deviation calculated by using such an equivalent circuit of FET agree well with the measured results at 933.5 MHz. Phase deviation mechanism is explained based on the large-signal equivalent circuit of FET, and it is shown how non-linear parameters, such as trans-conductance (gm), drain-source resistance (Rds), gate-source capacitance (Cgs), and gate leak resistance (Rig) contribute to positive or negative phase deviations. The difference between small-signal and large-signal S-parameters (S11, S12, S21, S22) is also discussed. The proposed large-signal modeling method is considered to be useful for the design of high power, high efficiency, and low distortion amplifiers as well as the investigation of the behavior of FET in large-signal operating conditions.},
keywords={},
doi={},
ISSN={},
month={July},}
Copier
TY - JOUR
TI - An Efficient Large-Signal Modeling Method Using Load-Line Analysis and Its Application to Non-linear Characterization of FET
T2 - IEICE TRANSACTIONS on Electronics
SP - 875
EP - 880
AU - Yukio IKEDA
AU - Kazutomi MORI
AU - Masatoshi NAKAYAMA
AU - Yasushi ITOH
AU - Osami ISHIDA
AU - Tadashi TAKAGI
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E84-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2001
AB - An efficient large-signal modeling method of FET using load-line analysis is proposed, and it is applied to non-linear characterization of FET. In this method, instantaneous drain-source voltage Vds(t) and drain-source current Ids(t) waveforms are determined by load-line analysis while non-linear parameters in a large-signal equivalent circuit of FET are defined as the average values over one period corresponding to instantaneous Vds(t) and Ids(t). Output power (Pout), power added efficiency (ηadd), and phase deviation calculated by using such an equivalent circuit of FET agree well with the measured results at 933.5 MHz. Phase deviation mechanism is explained based on the large-signal equivalent circuit of FET, and it is shown how non-linear parameters, such as trans-conductance (gm), drain-source resistance (Rds), gate-source capacitance (Cgs), and gate leak resistance (Rig) contribute to positive or negative phase deviations. The difference between small-signal and large-signal S-parameters (S11, S12, S21, S22) is also discussed. The proposed large-signal modeling method is considered to be useful for the design of high power, high efficiency, and low distortion amplifiers as well as the investigation of the behavior of FET in large-signal operating conditions.
ER -