The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Cet article décrit une technologie CMOS à tension de seuil variable (VTCMOS) qui contrôle la tension de seuil (VTH) au moyen d'un contrôle de polarisation du substrat. Des techniques de circuit permettant de combiner un circuit de commutation pour un mode actif et un circuit de pompe pour un mode veille sont présentées. Des considérations de conception, telles que l'immunité de verrouillage et la limite supérieure de polarisation inverse du substrat, sont discutées. Les résultats expérimentaux obtenus à partir de puces fabriquées selon une technologie VTCMOS de 0.3 µm sont rapportés. VTH contrôlabilité, y compris la dépendance à la température et l'influence sur l'effet de canal court, la pénalité de puissance causée par le circuit de commande, la dépendance au courant du substrat à faible VTH, et l'influence du bruit du substrat sur les performances du circuit sont étudiées. Une théorie de mise à l'échelle est également présentée pour être utilisée dans la discussion des possibilités futures et des problèmes impliqués dans cette technologie.
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Tadahiro KURODA, Tetsuya FUJITA, Fumitoshi HATORI, Takayasu SAKURAI, "Variable Threshold-Voltage CMOS Technology" in IEICE TRANSACTIONS on Electronics,
vol. E83-C, no. 11, pp. 1705-1715, November 2000, doi: .
Abstract: This paper describes a Variable Threshold-voltage CMOS technology (VTCMOS) which controls the threshold voltage (VTH) by means of substrate bias control. Circuit techniques to combine a switch circuit for an active mode and a pump circuit for a standby mode are presented. Design considerations, such as latch-up immunity and upper limit of reverse substrate bias, are discussed. Experimental results obtained from chips fabricated in a 0.3 µm VTCMOS technology are reported. VTH controllability including temperature dependence and influence on short channel effect, power penalty caused by the control circuit, substrate current dependence at low VTH, and substrate noise influence on circuit performance are investigated. A scaling theory is also presented for use in the discussion of future possibilities and problems involved in this technology.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e83-c_11_1705/_p
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@ARTICLE{e83-c_11_1705,
author={Tadahiro KURODA, Tetsuya FUJITA, Fumitoshi HATORI, Takayasu SAKURAI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Variable Threshold-Voltage CMOS Technology},
year={2000},
volume={E83-C},
number={11},
pages={1705-1715},
abstract={This paper describes a Variable Threshold-voltage CMOS technology (VTCMOS) which controls the threshold voltage (VTH) by means of substrate bias control. Circuit techniques to combine a switch circuit for an active mode and a pump circuit for a standby mode are presented. Design considerations, such as latch-up immunity and upper limit of reverse substrate bias, are discussed. Experimental results obtained from chips fabricated in a 0.3 µm VTCMOS technology are reported. VTH controllability including temperature dependence and influence on short channel effect, power penalty caused by the control circuit, substrate current dependence at low VTH, and substrate noise influence on circuit performance are investigated. A scaling theory is also presented for use in the discussion of future possibilities and problems involved in this technology.},
keywords={},
doi={},
ISSN={},
month={November},}
Copier
TY - JOUR
TI - Variable Threshold-Voltage CMOS Technology
T2 - IEICE TRANSACTIONS on Electronics
SP - 1705
EP - 1715
AU - Tadahiro KURODA
AU - Tetsuya FUJITA
AU - Fumitoshi HATORI
AU - Takayasu SAKURAI
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E83-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 2000
AB - This paper describes a Variable Threshold-voltage CMOS technology (VTCMOS) which controls the threshold voltage (VTH) by means of substrate bias control. Circuit techniques to combine a switch circuit for an active mode and a pump circuit for a standby mode are presented. Design considerations, such as latch-up immunity and upper limit of reverse substrate bias, are discussed. Experimental results obtained from chips fabricated in a 0.3 µm VTCMOS technology are reported. VTH controllability including temperature dependence and influence on short channel effect, power penalty caused by the control circuit, substrate current dependence at low VTH, and substrate noise influence on circuit performance are investigated. A scaling theory is also presented for use in the discussion of future possibilities and problems involved in this technology.
ER -