The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Une puce de microcontrôleur 32 bits spécifique aux entraînements de moteur a été nouvellement conçue, mise en œuvre à l'aide d'un processus CMOS double métal de 0.8 µm, et sa faisabilité a été testée avec succès en appliquant la puce de microcontrôleur fabriquée à un véritable système d'entraînement de moteur à induction à courant alternatif. La puce du microcontrôleur comprend une unité à virgule flottante simple précision, des périphériques pour l'entraînement du moteur et un contrôleur de mémoire ainsi que le SPARC. V7 processeurs. Le schéma de pipeline et la méthode de multiplication en deux étapes ont été utilisés dans le multiplicateur d'unité à virgule flottante pour obtenir le meilleur compromis entre la surface et la vitesse, en utilisant la bibliothèque de cellules standard disponible pour la conception. La taille de la puce est de 12.7
Jin-Cheon KIM
Sang-Hoon LEE
Joo-Hyun LEE
Do-Young LEE
Won-Chang JUNG
Hong-June PARK
Im-Soo MOK
Hyung-Gyun KIM
Ga-Woo PARK
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copier
Jin-Cheon KIM, Sang-Hoon LEE, Joo-Hyun LEE, Do-Young LEE, Won-Chang JUNG, Hong-June PARK, Im-Soo MOK, Hyung-Gyun KIM, Ga-Woo PARK, "Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 9, pp. 1699-1706, September 1999, doi: .
Abstract: A 32-bit motor-drive-specific microcontroller chip was newly designed, implemented using a 0.8 µm double-metal CMOS process, and its feasibility was successfully tested by applying the fabricated microcontroller chip to a real AC induction motor drive system. The microcontroller chip includes a single-precision floating-point unit, peripheral devices for motor drive, and a memory controller as well as the SPARC V7 CPU. The pipeline scheme and the two-step multiplication method were used in the multiplier of floating-point unit for the best area and speed trade-off, using the standard cell library available for the design. The chip size is 12.7
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_9_1699/_p
Copier
@ARTICLE{e82-c_9_1699,
author={Jin-Cheon KIM, Sang-Hoon LEE, Joo-Hyun LEE, Do-Young LEE, Won-Chang JUNG, Hong-June PARK, Im-Soo MOK, Hyung-Gyun KIM, Ga-Woo PARK, },
journal={IEICE TRANSACTIONS on Electronics},
title={Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit},
year={1999},
volume={E82-C},
number={9},
pages={1699-1706},
abstract={A 32-bit motor-drive-specific microcontroller chip was newly designed, implemented using a 0.8 µm double-metal CMOS process, and its feasibility was successfully tested by applying the fabricated microcontroller chip to a real AC induction motor drive system. The microcontroller chip includes a single-precision floating-point unit, peripheral devices for motor drive, and a memory controller as well as the SPARC V7 CPU. The pipeline scheme and the two-step multiplication method were used in the multiplier of floating-point unit for the best area and speed trade-off, using the standard cell library available for the design. The chip size is 12.7
keywords={},
doi={},
ISSN={},
month={September},}
Copier
TY - JOUR
TI - Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit
T2 - IEICE TRANSACTIONS on Electronics
SP - 1699
EP - 1706
AU - Jin-Cheon KIM
AU - Sang-Hoon LEE
AU - Joo-Hyun LEE
AU - Do-Young LEE
AU - Won-Chang JUNG
AU - Hong-June PARK
AU - Im-Soo MOK
AU - Hyung-Gyun KIM
AU - Ga-Woo PARK
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 1999
AB - A 32-bit motor-drive-specific microcontroller chip was newly designed, implemented using a 0.8 µm double-metal CMOS process, and its feasibility was successfully tested by applying the fabricated microcontroller chip to a real AC induction motor drive system. The microcontroller chip includes a single-precision floating-point unit, peripheral devices for motor drive, and a memory controller as well as the SPARC V7 CPU. The pipeline scheme and the two-step multiplication method were used in the multiplier of floating-point unit for the best area and speed trade-off, using the standard cell library available for the design. The chip size is 12.7
ER -