The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Cet article décrit une nouvelle méthode de mesure d'un CD-SEM avec une précision de l'ordre du nanomètre et une bonne corrélation avec les caractéristiques électriques pour un dispositif réel d'intégration à très grande échelle (ULSI). Avec la diminution de la taille des caractéristiques, le motif à mesurer tend à prendre une forme incurvée. Afin de mesurer un tel motif avec une précision de mesure de l’ordre de 5 nm, une mesure bidimensionnelle est efficace. Nous rapportons ici un nouvel algorithme de mesure selon lequel la dimension critique est dérivée de la valeur de l'aire d'un modèle de mesure. Nous appliquons cette méthode de mesure à un dispositif réel de DRAM de 64 Mbits et confirmons la reproductibilité de 3.6 nm pour la mesure de la largeur de ligne de grille et celle de 5.6 nm pour la mesure du diamètre du trou. De plus, nous vérifions que les valeurs de mesure de la largeur de la grille ont une forte corrélation avec la tension de seuil et que celles du diamètre du trou ont également une forte corrélation avec la résistance de contact, respectivement.
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Fumio KOMATSU, Motosuke MIYOSHI, Hiromu FUJIOKA, "A New CD Measurement Method Linked with the Electrical Properties of Devices" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 7, pp. 1347-1352, July 1999, doi: .
Abstract: This paper describes a new measurement method of a CD-SEM with nanometer-level precision and good correlation with electrical characteristics for an actual device of ultra-large-scale integration (ULSI). With the decrease in feature size, the pattern to be measured tends to become a curved shape. In order to measure such a pattern within measurement precision on the order of 5 nm, two-dimensional measurement is effective. Here we report a new measurement algorithm featuring that the critical dimension is derived from the value of the area of a measurement pattern. We apply this measurement method to actual device of 64-Mbit DRAM and confirm the reproducibility of 3.6 nm for the gate linewidth measurement, and that of 5.6 nm for the hole diameter measurement. Furthermore, we verify that the measurement values of the gate linewidth have a strong correlation with the threshold voltage and those of the hole diameter also have a strong correlation with the contact resistance, respectively.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_7_1347/_p
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@ARTICLE{e82-c_7_1347,
author={Fumio KOMATSU, Motosuke MIYOSHI, Hiromu FUJIOKA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A New CD Measurement Method Linked with the Electrical Properties of Devices},
year={1999},
volume={E82-C},
number={7},
pages={1347-1352},
abstract={This paper describes a new measurement method of a CD-SEM with nanometer-level precision and good correlation with electrical characteristics for an actual device of ultra-large-scale integration (ULSI). With the decrease in feature size, the pattern to be measured tends to become a curved shape. In order to measure such a pattern within measurement precision on the order of 5 nm, two-dimensional measurement is effective. Here we report a new measurement algorithm featuring that the critical dimension is derived from the value of the area of a measurement pattern. We apply this measurement method to actual device of 64-Mbit DRAM and confirm the reproducibility of 3.6 nm for the gate linewidth measurement, and that of 5.6 nm for the hole diameter measurement. Furthermore, we verify that the measurement values of the gate linewidth have a strong correlation with the threshold voltage and those of the hole diameter also have a strong correlation with the contact resistance, respectively.},
keywords={},
doi={},
ISSN={},
month={July},}
Copier
TY - JOUR
TI - A New CD Measurement Method Linked with the Electrical Properties of Devices
T2 - IEICE TRANSACTIONS on Electronics
SP - 1347
EP - 1352
AU - Fumio KOMATSU
AU - Motosuke MIYOSHI
AU - Hiromu FUJIOKA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 1999
AB - This paper describes a new measurement method of a CD-SEM with nanometer-level precision and good correlation with electrical characteristics for an actual device of ultra-large-scale integration (ULSI). With the decrease in feature size, the pattern to be measured tends to become a curved shape. In order to measure such a pattern within measurement precision on the order of 5 nm, two-dimensional measurement is effective. Here we report a new measurement algorithm featuring that the critical dimension is derived from the value of the area of a measurement pattern. We apply this measurement method to actual device of 64-Mbit DRAM and confirm the reproducibility of 3.6 nm for the gate linewidth measurement, and that of 5.6 nm for the hole diameter measurement. Furthermore, we verify that the measurement values of the gate linewidth have a strong correlation with the threshold voltage and those of the hole diameter also have a strong correlation with the contact resistance, respectively.
ER -