The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Une nouvelle méthodologie de détermination des paramètres de ligne de transmission d'interconnexion IC et une nouvelle technique de simulation rapide pour les lignes de transmission non uniformes sont présentées et vérifiées. Le paramètre de capacité est fortement fonction de l'effet de blindage entre les couches, tandis que le substrat de silicium a un effet substantiel sur le paramètre d'inductance. Ainsi, ils sont pris en compte pour déterminer les paramètres. Ensuite, les paramètres par unité de longueur basés sur une ligne droite virtuelle sont déterminés afin d'effectuer la simulation transitoire rapide des lignes de transmission non uniformes. Il a été montré que non seulement l’effet d’inductance dû à un substrat de silicium mais aussi l’effet de blindage entre les couches sont trop importants pour être négligés. En outre, une technique de réduction d'ordre de modèle est intégrée à Berkeley SPICE afin de démontrer que les paramètres virtuels par unité de longueur basés sur une ligne droite peuvent être utilisés efficacement pour la simulation de réponse transitoire rapide des structures d'interconnexion multicouches complexes. Étant donné que la méthodologie est très efficace et précise, elle peut être utilement utilisée pour les outils de CAO IC de conception de circuits VLSI hautes performances.
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Woojin JIN, Hanjong YOO, Yungseon EO, "Non-uniform Multi-Layer IC Interconnect Transmission Line Characterization for Fast Signal Transient Simulation of High-Speed/High-Density VLSI Circuits" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 6, pp. 955-966, June 1999, doi: .
Abstract: A new IC interconnect transmission line parameter determination methodology and a novel fast simulation technique for non-uniform transmission lines are presented and verified. The capacitance parameter is a strong function of a shielding effect between the layers, while silicon substrate has a substantial effect on inductance parameter. Thus, they are taken into account to determine the parameters. Then the virtual straight-line-based per unit length parameters are determined in order to perform the fast transient simulation of the non-uniform transmission lines. It was shown that not only the inductance effect due to a silicon substrate but also the shielding effect between the layers are too significant to be neglected. Further, a model order reduction technique is integrated into Berkeley SPICE in order to demonstrate that the virtual straight-line-based per-unit-length parameters can be efficiently employed for the fast transient response simulation of the complicated multi-layer interconnect structures. Since the methodology is very efficient as well as accurate, it can be usefully employed for IC CAD tools of high-performance VLSI circuit design.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_6_955/_p
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@ARTICLE{e82-c_6_955,
author={Woojin JIN, Hanjong YOO, Yungseon EO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Non-uniform Multi-Layer IC Interconnect Transmission Line Characterization for Fast Signal Transient Simulation of High-Speed/High-Density VLSI Circuits},
year={1999},
volume={E82-C},
number={6},
pages={955-966},
abstract={A new IC interconnect transmission line parameter determination methodology and a novel fast simulation technique for non-uniform transmission lines are presented and verified. The capacitance parameter is a strong function of a shielding effect between the layers, while silicon substrate has a substantial effect on inductance parameter. Thus, they are taken into account to determine the parameters. Then the virtual straight-line-based per unit length parameters are determined in order to perform the fast transient simulation of the non-uniform transmission lines. It was shown that not only the inductance effect due to a silicon substrate but also the shielding effect between the layers are too significant to be neglected. Further, a model order reduction technique is integrated into Berkeley SPICE in order to demonstrate that the virtual straight-line-based per-unit-length parameters can be efficiently employed for the fast transient response simulation of the complicated multi-layer interconnect structures. Since the methodology is very efficient as well as accurate, it can be usefully employed for IC CAD tools of high-performance VLSI circuit design.},
keywords={},
doi={},
ISSN={},
month={June},}
Copier
TY - JOUR
TI - Non-uniform Multi-Layer IC Interconnect Transmission Line Characterization for Fast Signal Transient Simulation of High-Speed/High-Density VLSI Circuits
T2 - IEICE TRANSACTIONS on Electronics
SP - 955
EP - 966
AU - Woojin JIN
AU - Hanjong YOO
AU - Yungseon EO
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 1999
AB - A new IC interconnect transmission line parameter determination methodology and a novel fast simulation technique for non-uniform transmission lines are presented and verified. The capacitance parameter is a strong function of a shielding effect between the layers, while silicon substrate has a substantial effect on inductance parameter. Thus, they are taken into account to determine the parameters. Then the virtual straight-line-based per unit length parameters are determined in order to perform the fast transient simulation of the non-uniform transmission lines. It was shown that not only the inductance effect due to a silicon substrate but also the shielding effect between the layers are too significant to be neglected. Further, a model order reduction technique is integrated into Berkeley SPICE in order to demonstrate that the virtual straight-line-based per-unit-length parameters can be efficiently employed for the fast transient response simulation of the complicated multi-layer interconnect structures. Since the methodology is very efficient as well as accurate, it can be usefully employed for IC CAD tools of high-performance VLSI circuit design.
ER -