The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Les impacts des interférences électromagnétiques (EM) (immunité) sur le fonctionnement des circuits LSI dans un environnement conditionné en QFP et monté sur PCB sont étudiés. L'injection de puissance EM dans un système d'alimentation entraîne un dysfonctionnement, où la puissance est traduite en rebonds de tension à travers des impédances combinées sur et hors puce, affectant l'alimentation et la masse, ainsi que les nœuds de signal dans une puce, vus de dessus. mesures de forme d'onde de puce. Un modèle d'impédance d'alimentation localisé et l'amplitude minimale du rebond de tension induit par la puissance EM en cas de dysfonctionnement, qui peuvent tous deux être dérivés de mesures externes sur un LSI emballé donné, formulent un modèle d'interférence EM qui est utile dans la conception de PCB vers des niveaux élevés. immunité. La technique peut être généralement appliquée aux applications de systèmes sur puce.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copier
Kouji ICHIKAWA, Yuki TAKAHASHI, Yukihiko SAKURAI, Takahiro TSUDA, Isao IWASE, Makoto NAGATA, "Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation" in IEICE TRANSACTIONS on Electronics,
vol. E91-C, no. 6, pp. 936-944, June 2008, doi: 10.1093/ietele/e91-c.6.936.
Abstract: Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. The technique can be generally applied to systems-on-chip applications.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e91-c.6.936/_p
Copier
@ARTICLE{e91-c_6_936,
author={Kouji ICHIKAWA, Yuki TAKAHASHI, Yukihiko SAKURAI, Takahiro TSUDA, Isao IWASE, Makoto NAGATA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation},
year={2008},
volume={E91-C},
number={6},
pages={936-944},
abstract={Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. The technique can be generally applied to systems-on-chip applications.},
keywords={},
doi={10.1093/ietele/e91-c.6.936},
ISSN={1745-1353},
month={June},}
Copier
TY - JOUR
TI - Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation
T2 - IEICE TRANSACTIONS on Electronics
SP - 936
EP - 944
AU - Kouji ICHIKAWA
AU - Yuki TAKAHASHI
AU - Yukihiko SAKURAI
AU - Takahiro TSUDA
AU - Isao IWASE
AU - Makoto NAGATA
PY - 2008
DO - 10.1093/ietele/e91-c.6.936
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E91-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2008
AB - Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. The technique can be generally applied to systems-on-chip applications.
ER -