The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Cet article étudie un modèle de dispositif du courant d'alimentation utilisé pour un LSI/IC. Le modèle est proposé pour analyser le bruit du bus de puissance dans les cartes de circuits imprimés numériques. Ce modèle est défini dans le domaine fréquentiel et construit avec une impédance interne équivalente et une source de courant interne équivalente. En conséquence, le courant de sortie du modèle est affecté par l'impédance du bus d'alimentation, telle que la capacité des condensateurs de dérivation et l'inductance parasite du câblage du bus d'alimentation. Par conséquent, le modèle est utile pour analyser l’efficacité des condensateurs de dérivation et du câblage du bus d’alimentation. La structure de l'impédance interne équivalente pour un circuit intégré logique simple, tel que 74HCXX, peut être représentée comme un RLC circuit en série. Ces paramètres sont identifiés en appliquant la méthode des moindres carrés. Pour démontrer la validité du modèle, une étude expérimentale a été menée. En conséquence, il a été démontré que le courant de sortie du modèle correspond au courant mesuré sous divers niveaux d’impédance du bus de puissance dans les 6 dB.
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Yukihiro FUKUMOTO, Yasuo TAKAHATA, Osami WADA, Yoshitaka TOYOTA, Takuya MIYASHITA, Ryuji KOGA, "Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits" in IEICE TRANSACTIONS on Communications,
vol. E84-B, no. 11, pp. 3041-3049, November 2001, doi: .
Abstract: This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an RLC series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e84-b_11_3041/_p
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@ARTICLE{e84-b_11_3041,
author={Yukihiro FUKUMOTO, Yasuo TAKAHATA, Osami WADA, Yoshitaka TOYOTA, Takuya MIYASHITA, Ryuji KOGA, },
journal={IEICE TRANSACTIONS on Communications},
title={Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits},
year={2001},
volume={E84-B},
number={11},
pages={3041-3049},
abstract={This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an RLC series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.},
keywords={},
doi={},
ISSN={},
month={November},}
Copier
TY - JOUR
TI - Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits
T2 - IEICE TRANSACTIONS on Communications
SP - 3041
EP - 3049
AU - Yukihiro FUKUMOTO
AU - Yasuo TAKAHATA
AU - Osami WADA
AU - Yoshitaka TOYOTA
AU - Takuya MIYASHITA
AU - Ryuji KOGA
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E84-B
IS - 11
JA - IEICE TRANSACTIONS on Communications
Y1 - November 2001
AB - This paper investigates a device model of the power current used for an LSI/IC. The model is proposed to analyze the power bus noise in digital circuit boards. This model is defined in the frequency domain and constructed with an equivalent internal impedance and an equivalent internal current source. Accordingly, the output current of the model is affected by power bus impedance, such as the capacitance of bypass capacitors and the parasitic inductance of power bus wiring. Therefore, the model is useful for analyzing the effectiveness of bypass capacitors and power bus wiring. The structure of equivalent internal impedance for a simple logic IC, such as 74HCXX, can be represented as an RLC series circuit. These parameters are identified by applying the least square method. To demonstrate the validity of the model, an experimental study was conducted. As a result, it was shown that the output current of the model corresponds to the measured current under a variety of power bus impedance levels within 6 dB.
ER -