The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
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The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
Une classe E basse dv/dt Un redresseur synchrone PWM régulant la tension de sortie à une fréquence fixe est présenté, analysé et vérifié expérimentalement. Ce redresseur est issu de la classe E faible dv/dt redresseur en remplaçant l'interrupteur commandé (MOSFET avec sa diode anti-parallèle) par la diode du redresseur en classe E basse dv/dt redresseur, et en utilisant le signal PWM synchronisé pour contrôler la tension de sortie à la valeur souhaitée. La condition ZVS du commutateur contrôlé peut être maintenue de pleine charge à charge ouverte. Les résultats expérimentaux mesurés à la fréquence de commutation de 1 MHz sont en bon accord avec la prédiction théorique.
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Itsda BOONYAROONATE, Shinsaku MORI, "Analysis and Design of Class E Low dv/dt PWM Synchronous Rectifier Regulating the Output Voltage at a Fixed Frequency" in IEICE TRANSACTIONS on Communications,
vol. E84-B, no. 10, pp. 2880-2886, October 2001, doi: .
Abstract: A class E low dv/dt PWM synchronous rectifier regulating the output voltage at a fixed frequency is presented, analyzed and verified experimentally. This rectifier is derived from the class E low dv/dt rectifier by replacing the controlled switch (MOSFET with its anti-parallel diode) with the rectifier diode in class E low dv/dt rectifier, and by using the synchronized PWM signal to control the output voltage at desired value. The ZVS condition of the controlled switch can be maintained from full-loaded to open-loaded. The experimental results measured at switching frequency 1 MHz are in good agreement with the theoretical prediction.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e84-b_10_2880/_p
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@ARTICLE{e84-b_10_2880,
author={Itsda BOONYAROONATE, Shinsaku MORI, },
journal={IEICE TRANSACTIONS on Communications},
title={Analysis and Design of Class E Low dv/dt PWM Synchronous Rectifier Regulating the Output Voltage at a Fixed Frequency},
year={2001},
volume={E84-B},
number={10},
pages={2880-2886},
abstract={A class E low dv/dt PWM synchronous rectifier regulating the output voltage at a fixed frequency is presented, analyzed and verified experimentally. This rectifier is derived from the class E low dv/dt rectifier by replacing the controlled switch (MOSFET with its anti-parallel diode) with the rectifier diode in class E low dv/dt rectifier, and by using the synchronized PWM signal to control the output voltage at desired value. The ZVS condition of the controlled switch can be maintained from full-loaded to open-loaded. The experimental results measured at switching frequency 1 MHz are in good agreement with the theoretical prediction.},
keywords={},
doi={},
ISSN={},
month={October},}
Copier
TY - JOUR
TI - Analysis and Design of Class E Low dv/dt PWM Synchronous Rectifier Regulating the Output Voltage at a Fixed Frequency
T2 - IEICE TRANSACTIONS on Communications
SP - 2880
EP - 2886
AU - Itsda BOONYAROONATE
AU - Shinsaku MORI
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E84-B
IS - 10
JA - IEICE TRANSACTIONS on Communications
Y1 - October 2001
AB - A class E low dv/dt PWM synchronous rectifier regulating the output voltage at a fixed frequency is presented, analyzed and verified experimentally. This rectifier is derived from the class E low dv/dt rectifier by replacing the controlled switch (MOSFET with its anti-parallel diode) with the rectifier diode in class E low dv/dt rectifier, and by using the synchronized PWM signal to control the output voltage at desired value. The ZVS condition of the controlled switch can be maintained from full-loaded to open-loaded. The experimental results measured at switching frequency 1 MHz are in good agreement with the theoretical prediction.
ER -